Layer 1 Decoded: Every Physical Form Factor in a Modern Rack

A form factor is not a speed. It is a cage, a lane count and a power budget — the speed falls out of the arithmetic. Nearly every pluggable connector in a modern rack, from a 1G SFP to a 1.6T OSFP-XD, is the same idea repeated: some number of electrical lanes, each running at some rate, inside a shell with enough room to shed the heat. Once you internalize that, the alphabet soup stops being alphabet soup.

This is a field guide to the Layer 1 physical layer as it exists in 2026 — the pluggable optics families, the PCIe-domain connectors that have quietly become just as important, and the proprietary shells that sit on top of both.

The one rule that explains almost everything

Lanes × per-lane rate = link speed. That is it. 40G is four 10G lanes. 100G is four 25G lanes. 400G is either eight 50G lanes or four 100G lanes, depending on which cage you picked. When the industry wants more speed it does one of two things: add lanes (wider cage, more contacts, more power) or push each lane faster (harder signal integrity, shorter copper reach).

The second variable is modulation. Everything through 25G per lane used NRZ — two voltage levels, one bit per symbol. From 50G per lane onward the industry moved to PAM4, four voltage levels, two bits per symbol at the same baud rate. PAM4 buys bandwidth at the cost of a much tighter signal-to-noise budget, which is why passive copper reach collapsed from 5 m at 10G to roughly 2 m at 100G per lane, and why active copper and optics keep eating territory that used to be copper's.

The SFP family: one lane, six generations

Every SFP-family module carries a single electrical lane. The mechanical footprint has barely changed since 2001, which is why a switch built in 2010 and one built last year still take modules that look identical.

• SFP — 1 lane at 1G. Still the workhorse of access-layer copper and 1G fiber uplinks, and still shipping in volume because campus switching never actually left 1G.
• SFP+ — 1 lane at 10G NRZ. The most widely deployed high-speed optic in existence. Also covers 8G/16G Fibre Channel.
• SFP28 — 1 lane at 25G NRZ. The server-access standard for anything built after roughly 2018; 25G to the NIC, 100G QSFP28 on the uplink.
• SFP56 — 1 lane at 50G PAM4. First single-lane PAM4 part. Real, but thinly deployed — most designs jumped from 25G straight to 100G.
• SFP112 — 1 lane at 100G PAM4. Single-lane 100G, aimed at high-density server access where you want 100G per port without spending four lanes on it.
• SFP-DD — 2 lanes. The MSA doubles the contact rows to 40 pads (20 top, 20 bottom) for 2×50G PAM4 = 100G, with SFP-DD112 taking that to 2×100G = 200G. A key property: the SFP-DD cage still accepts SFP+, SFP28 and SFP112 modules, running them on a single lane. Adoption has stayed niche — the competing DSFP MSA split the market, and QSFP28 mostly ate the 100G use case.

Backward compatibility runs downward inside the family. An SFP28 port will happily take an SFP+ or SFP module and negotiate down. The reverse is not true: an SFP+ cage cannot make an SFP28 module run at 25G, because the host lane behind it does not go that fast.

The QSFP family: four lanes, and then eight

Q is for quad. The QSFP cage takes the SFP idea and puts four lanes behind it, which is why QSFP has been the uplink and fabric connector of choice for fifteen years.

• QSFP+ — 4 × 10G NRZ = 40G. Also the original 4×10G breakout connector, which is where the whole "one port, four servers" pattern came from.
• QSFP28 — 4 × 25G NRZ = 100G. Probably the highest-volume data centre optic ever made. Also carries 100G EDR InfiniBand.
• QSFP56 — 4 × 50G PAM4 = 200G. NVIDIA's HDR InfiniBand generation, and the connector on ConnectX-6 and on the DGX Spark's ConnectX-7 ports.
• QSFP112 — 4 × 100G PAM4 = 400G. The efficient path to 400G: same four-lane cage, faster lanes, lower power and lower cost than an eight-lane 400G module. It is the natural upgrade for anyone already standardized on QSFP mechanics.
• QSFP-DD — double density, 8 lanes. A second row of contacts sits deeper in a taller cage, giving 8×25G = 200G, 8×50G = 400G, and 8×100G = 800G in QSFP-DD800. Crucially, the cage is mechanically backward compatible: QSFP+, QSFP28, QSFP56 and QSFP112 modules all drop into a QSFP-DD port and use the top row only.

That backward compatibility is the entire commercial argument for QSFP-DD. If your installed base is QSFP, a QSFP-DD switch is a forward step you can take without stranding a single existing optic.

OSFP: the one built for the power budget

OSFP is also eight lanes, but it was designed from a different starting assumption — that 400G and 800G modules would run hot, and the cage should be sized for that rather than fighting it. It is slightly larger than QSFP-DD and carries a meaningfully higher power envelope, comfortably past 30W where QSFP-DD is typically budgeted around 12W.

• OSFP — 8 × 50G = 400G, or 8 × 100G = 800G. Not mechanically compatible with QSFP without an adapter, which is the tradeoff for the thermal headroom.
• OSFP twin-port (2×400G) — the configuration that trips people up. One module contains two independent 400G optical engines behind two MPO connectors. NVIDIA's Quantum-2 QM9700 uses it so that 32 physical OSFP cages present as 64 logical 400G NDR ports. The module is 800G of electrical bandwidth split into two 400G links, not a single 800G link.
• OSFP-XD — 16 lanes, targeting 1.6T. The next doubling, currently at the top of the market.

OSFP also comes in finned-top and flat-top shells. Finned modules go in switch cages where the module dissipates its own heat; flat-top (OSFP-RHS) goes on adapter cards like ConnectX-7, where the host's own heatsink does the work. Same electrical part, different thermal design, and ordering the wrong one is one of the most common and most annoying procurement mistakes in this category. We wrote about that specific trap in Flat-Top or Finned-Top OSFP?, and about the broader choice in OSFP vs. QSFP-DD for GPU clusters.

Pluggable module quick reference

The other half of Layer 1: the PCIe domain

Everything above moves Ethernet or InfiniBand frames. There is a second family of connectors inside the chassis that moves PCIe lanes, and as GPUs and NVMe have pushed PCIe out of the motherboard and onto cable, these have gone from an integrator's detail to a first-class part of the physical layer.

• OCuLink (SFF-8611) — 4i and 8i widths, native PCIe 3.0/4.0. Its original job was routing PCIe to U.2 NVMe backplanes; its second life is external PCIe for eGPU docks and modular workstations. A Gen4 x4 OCuLink link is 64 GT/s, which is why it became the enthusiast eGPU connector of choice.
• SlimSAS (SFF-8654) — 4i and 8i, native PCIe 4.0 and SAS-4 at 24G. The connector you will find on most Gen10/Gen11-era server boards handling mixed SAS and NVMe. It can be pushed to Gen5 with retimers and a careful channel budget, but it was not designed for it.
• MCIO (SFF-TA-1016) — 38-pin x4, 74-pin x8 and 124-pin x16. Designed from the start for Gen5 (32 GT/s) and Gen6 (64 GT/s) jitter budgets. This is the connector new server designs are standardizing on, and adapter cables from MCIO to SlimSAS and OCuLink are now routine because the installed base is mixed.
• PCIe cables / CopprLink — in 2024 PCI-SIG formalized what integrators had been improvising. CopprLink Internal runs 32 and 64 GT/s over SFF-TA-1016 (MCIO) connectors up to 1 m inside a chassis. CopprLink External uses SFF-TA-1032 for up to 2 m rack-to-rack, aimed squarely at CPU-to-accelerator and CPU-to-memory disaggregation. That external spec is the physical layer under a lot of the "composable infrastructure" conversation.

The practical takeaway: a cable is not defined by its plug alone. An 8i shell that works fine at Gen4 may fail at Gen5 with the same pinout, because the difference is in the cable construction and the channel budget, not the connector picture on the listing.

Proprietary connectors, and what is actually proprietary about them

The last category is the one that costs people the most money. It splits into three genuinely different things, and they should not be treated the same way.

Coded standard modules. A Cisco, Arista, Juniper or HPE optic is very often a standards-compliant module with a vendor ID written into its EEPROM. The physics is the MSA; the lock is a few bytes and a software check. This is the category where third-party equivalents are genuinely equivalent, and where the price delta is largest.

Keyed or mechanically unique shells. Stacking connectors are the clearest case — Cisco StackWise on the Catalyst 9300, and its equivalents from HPE and Dell, use a proprietary high-speed connector that no MSA covers. There is no standards-based substitute; there is only the OEM part or a compatible one built to the same mechanical spec.

Internal cable kits. GPU power and riser cables, backplane harnesses, and rail kits are usually plain copper with an OEM part number and a 6× markup. The trouble here is rarely compatibility, it is identification — the same physical cable often appears under several part numbers across server generations, and the OEM documentation is frequently ambiguous about which one your chassis actually needs. HPE's ProLiant GPU power cable kits are a textbook example.

One clarification worth making because it confuses a lot of people: the module cage and the fibre connector are separate decisions. A QSFP28 module might terminate in duplex LC or in an MPO-12, depending on whether it is a parallel or a WDM part. "QSFP28" tells you about the electrical interface; it tells you nothing about which patch cable to order. Our breakdown of DAC vs. AOC vs. AEC covers where that decision lands in practice.

Why we track this

Resilient Tec does not manufacture any of these connectors. We spend our time in the secondary and compatible market underneath them, which means part-number identification is most of the job. The reason we keep a running map of the physical layer is simple: the majority of the expensive mistakes we see are not performance problems, they are identification problems. Someone orders a finned OSFP for a flat-top adapter. Someone buys an 8i cable rated for Gen4 and puts it in a Gen5 slot. Someone pays OEM pricing for a coded module whose only proprietary content is six bytes of EEPROM.

None of that is exotic knowledge. It is just Layer 1, and Layer 1 rewards people who read the spec sheet twice.

Frequently asked questions

What is the difference between QSFP-DD and OSFP?

Both carry eight electrical lanes and both support 400G and 800G. QSFP-DD is mechanically backward compatible with QSFP+, QSFP28, QSFP56 and QSFP112 modules, which makes it the lower-friction upgrade for an existing QSFP installed base. OSFP is slightly larger, is not QSFP-compatible without an adapter, and carries a higher power envelope — typically past 30W versus around 12W for QSFP-DD — which is why it dominates in high-power AI fabric deployments and why OSFP-XD is the path to 1.6T.

Is QSFP112 backward compatible with QSFP28 and QSFP56?

Mechanically yes — QSFP112 uses the same four-lane QSFP cage, so a QSFP112 port will physically accept earlier QSFP modules and run them at their native rate. The reverse does not apply: a QSFP28 port cannot drive a QSFP112 module at 400G because the host lanes behind it top out at 25G each. QSFP112 delivers 400G as 4 × 100G PAM4, which uses less power and less board area than an eight-lane 400G module.

What is a twin-port OSFP or OSFP 2×400G?

It is a single OSFP module containing two independent 400G optical engines with two separate MPO connectors. It carries 800G of electrical bandwidth, but presents as two 400G links rather than one 800G link. NVIDIA's Quantum-2 QM9700 switch uses this so that 32 physical OSFP cages provide 64 logical 400G NDR InfiniBand ports.

What is the difference between OCuLink, SlimSAS and MCIO?

All three carry PCIe lanes over cable, and they map roughly to PCIe generations. OCuLink (SFF-8611) is native to PCIe 3.0/4.0 and is common for U.2 NVMe routing and external eGPU links. SlimSAS (SFF-8654) is native to PCIe 4.0 and SAS-4, and is the standard on most Gen10/Gen11-era server boards. MCIO (SFF-TA-1016) was designed for PCIe 5.0 and 6.0 signal integrity budgets and is what new server designs use. Adapter cables between all three are common, but the cable's rated generation matters as much as its connector.

Can I put an SFP28 module in an SFP+ port?

It will fit, and in most cases it will link at 10G rather than 25G, because the host lane behind an SFP+ cage runs at 10G. Whether the switch accepts it at all depends on vendor firmware. Going the other direction — an SFP+ module in an SFP28 port — works reliably and is the normal way mixed-speed access layers are built.

Are OEM-coded transceivers electrically different from third-party modules?

Usually not. Most OEM-branded optics are built to the same MSA as everyone else's, with a vendor identifier written into the module's EEPROM that the switch checks at insertion. Third-party modules coded for that platform present the expected identifier and behave identically. Genuinely proprietary connectors do exist — stacking interfaces are the clearest example — but they are a much smaller category than the pricing would suggest.

Sources

• SNIA SFF — connector specifications (SFF-8611, SFF-8654, SFF-TA-1016, SFF-TA-1032)
• QSFP-DD MSA
• OSFP MSA
• SFP-DD MSA — hardware specification
• PCI-SIG — CopprLink internal and external cable specifications
• NVIDIA Networking — interconnect connectors and cages